IEEE

InnerSP: A Memory Efficient Sparse Matrix Multiplication Accelerator with Locality-Aware Inner Product Processing

Abstract: Sparse matrix multiplication is one of the key computational kernels in large-scale data analytics. However, a naive implementation suffers from the overheads of irregular memory accesses ...
GitHub

Enter the (Sparse) Matrix: An SpMV Accelerator on PYNQ

This work stems from the 'FPGA 101: From Reconfigurable to Domain-Specific Systems' course attended in fall '24 at NECSTLab, under the supervision of Asst. Prof. Davide Conficconi and Giuseppe ...
GitHub

Sparse-and-Precision-Aware-Mtarix-Multiply-Unit-with-Runtime-Multiplier-Switching-on-FPGA

This project is a hardware matrix multiplication accelerator that computes C = A × B for N×N matrices (currently only tested for NxN matrices, however the design is parameterized and with small ...
IEEE

ScanNow: A Scan Window-Based Sparse Matrix Multiplication Accelerator Design

Abstract: Sparse matrix-matrix multiplication (SpMM) is a prevailing kernel in scientific and artificial intelligence applications. However, the irregular memory access behaviors caused by diverse ...
Nature

Sparse Matrix Computations on Graphics Processing Units

Sparse matrix computations are pivotal to advancing high-performance scientific applications, particularly as modern numerical simulations and data analyses demand efficient management of large, ...